This Design and Implementation of Built In Self Test (BIST) seminar topic is mainly describes you about the how equipments can be test itself in the circuit, this process is called as the Built In Self Test. In this additional software and hardware components are integrated in the circuitry on the board itself, so that there is no need of using the additional equipments to check the functionality and performance of the equipment, so by this integration of hardware and software components will reduce the complexity of using external components for testing, the circuit itself observe the performance. Built in self test is also test the complex circuits that are not having any external connections, built in self test is the low cost technique to implement the self test, this technique is the best fault manager, very short time taken to complete test, palely two are more tests are done using Built in self test, easier support for the customers, it have the capability to test the outside of the equipment, but the disadvantage is circuit complexity, additional silicon area is required, less access timing, while implementing the this we have to take care of faults, check the chip area how much it occupied, to test the defects MISR (multiple input signature register) it give the response of the circuit, if it give any error then the we consider that the circuit is having fault, and array BIST is used mainly for embedded memories.
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Hello. Can I get the details of the entire project please?