PROJECT TITLE: Cyclic Redundancy Codes (CRC) For Parallel And Serial Communications
INTRODUCTION: As it is easily imaginable, we all would like to have no errors when transmitting data over the Internet or any other media, but defects in materials, interferences and other sources can Corrupt the data, so we have to provide the communication with ways of detecting and if possible correcting those errors. It could be highly desirable to be able to check this in an ccurate and fast way, and therefore many different strategies have been developed in the early years, but almost all were based in performing some kind of mathematical operation over the bits we are transmitting. In this way, the so-called CRC was rapidly widespread as a good way of checking errors. A mathematical operation is performed over the data that is going to be sent, and the result is appended at the end of the data, thus resulting the packet that will actually be sent. At the far end of the channel, the same operation is made. If the result is the one expected then there have not been problems. Else, the data is corrupted and something will have to be made (this “something” is out of the scope of the CRC generator; it is usually an issue corresponding to the upper layers of the communication protocol).
There are various methods available for serial (example USB) and parallel (example PCI bus) communication protocols. With this motivation I would like to study various serial and parallel communications protocols needs for CRC and would like the implement the same.
BLOCK DIAGRAM:
- CLK
- RSTn
- INITn
- LOAD
- D(M:O)
- CRC(N:)
ADVANTAGES:
CRC codes of length n can be generated which detect:
– All single and double errors
– Any odd number of errors
– Any burst error _ n and most larger error bursts
– Sample questions
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