Introduction to CSE Networking Project on Low Power Design of Precomputation-Based Content-Addressable Memory:
Content-addressable memory (CAM) is a special type of computer Memory used in certain very high speed searching applications such as such as lookup tables, databases, associative computing, networking and Asynchronous Transfer Mode (ATM). It is also known as associative memory/storage/array.The application performance can be improved by using parallel comparison which reduces search time and leads to high power consumption. In this paper, we propose a Block-XOR approach to improve the efficiency of low power precomputation- based CAM (PB-CAM) When compared with ones-count PB-CAM system, the experimental results presents practical proofs to verify that our proposed Block-XOR PB-CAM system can achieve greater power reduction without the need for a special CAM cell design which is flexible and adaptive for general designs.
In the existing system a CAM, functionalmemory which compares the input search data with the stored data. Once matching data are found, their addresses are returned as output which involves vast comparison operations with high power consumption.
The proposed system uses new parameter extractor called Block-XOR which reduces comparison operations by a minimum of 909 and a maximum of 2339.which achieve the requirement.
The software’s that are used for Simulation –Modelsim SE 6.3f,
Synthesis- Xilinx ISE 9.2i and
Hardware used is Spartan 3E.
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