Project Title: FPGA based edge enhancement
Project Description:
Many image processing algorithms, including edge detection/enhancement algorithms, have software implementation. But to be used in real time processing, hardware implementation becomes necessary.
This project will implement one of the edge enhancement algorithms using FPGA chip. A Verilog model has already been developed, but further improvement are needed to improve the performance further.
Product Details:
Verilog models of edge enhancement algorithm
Resources Required:
Altera Quartus II
Modelsim simulator