Introduction to Technical Seminar for CSE on Rapid IO Switch:
It is a packet interconnection that uses low pin count and packet switched system level. Its performance is very high. It is used in networking environment and computing platforms. It is an interconnecting microprocessor that has memory.
It is an application in network equipment. It has central processor which is connected to three control path. These control paths are connected to Input output card that contains traffic manager network processor. They are also connected to fabric switch. All the devices interconnected to each other.
Rapid I/O allows many devices to be interconnected. It has certain principles that have to be followed. Devices which are interconnected should be focused within the box. Silicon foot prints are limited. Hardware errors should be managed. Impact of software should be limited.
They are specified in three layers hierarchy:
– Logical specification: information required for the end point
– Transport specification: information transfer from end to end point.
– Physical specification: require to move packet from one device to other device.
Globally shared memory: request is made by user, then it is transferred to home memory then participants and then they give response to the user.
Flow control: the main work for the device is to complete the transaction from one device to other device without getting blocked. There are three types of flow mechanism: retry, throttle and credits.
Maintenance and error managements: it provides rich management systems error handling. These are: maintenance, system discovery, and error coverage and error recovery. They use packet structures and source routing technique that gives the high performance broadcast routing and source routing.
Conclusion: it is robust packet switching system. It provides high performance in systems by maintaining the implementation cost. It gives error free management that includes the multi-bit ability errors and single bit errors.
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